SoC Synthesis & PPA Optimization Engineer
North American Production Sharing, Inc.
North American Production Sharing, Inc. seeks an ASIC design engineer to synthesize large-scale SoC RTL into gate-level netlists and own multi-stage synthesis flows, ensuring PD handoff readiness.
You will optimize PPA, analyze timing constraints (SDC), and support functional ECOs while collaborating with Design, DFT, and Physical Design teams to deliver robust, manufacturable Snapdragon-class designs. Frontend experience in ASIC design and strong debugging, scripting, and execution under tight
#J-18808-LjbffrVacante publicada el 7 horas atrás
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North American Production Sharing, Inc.
Tijuana, B.C.7 horas atrás
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