SENIOR ENG-HIG-HBM-LAYOUT
Micron Technology, Inc
Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.
For more than 45 years, Micron Technology, Inc. has redefined innovation with the world’s most advanced memory and semiconductor technologies. We are an international team of visionaries and scientists developing groundbreaking technologies. These technologies transform how people globally access and use information to improve life.
We are looking for a Layout Design Staff Engineer at Micron Technology’s HBM Team in Guadalajara, Mexico. As a Layout Design engineer, you will be working for intensive applications such as artificial intelligence and high-performance computing solutions High Bandwidth Memory. You will be collaborating with peer teams crossing Micron global footprint, in a multiple project-based environment.
Responsibilities:
- Responsible for Design and development of critical analog, mixed-signal, custom digital block and full chip level integration support.
- Perform layout verification like LVS/DRC/Antenna, quality check and documentation.
- Responsible for on-time delivery of block-level layouts of acceptable quality.
- Will be leading planning, area/time estimation, scheduling, delegation and execution to meet project schedule/milestones in multiple project environment.
- Guide junior and senior team-members in their execution of Sub block-level layouts & review their work.
- Effectively communicating with Global engineering teams to assure the success of layout project.
Minimum Qualification:
- 7+ years' experience in analog/custom layout design in advanced CMOS process, in various technology nodes (Planar, FinFET).
- BE or MTech in Electronic/VLSI Engineering, or related.
- Expertise in Cadence VLE/VXL and Mentor Graphic Calibre DRC/LVS is a must.
- Should have hands on experience in creating layout of critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, Ref Generators, Charge Pump, Current Mirrors, Comparator, Differential Amplifier etc.,
- Knowledge of Analog Layout fundamentals (e.g., Matching, Electro-migration, Latch-up, coupling, crosstalk, IR-drop, active and passive parasitic devices etc.)
- Understanding layout effects on the circuit such as speed, capacitance, power and area etc.
- Ability to understand design constraints and implement high-quality layouts.
Preferred qualifications:
- Multiple Tape out support experience will be an added advantage.
- Experience in managing multiple layout projects, ensuring quality checks are taken care at all stages of layout development.
- Excellent command and problem-solving skills in physical verification of custom layout.
Semiconductor Design Engineer 3
Relocation Level: TBD
"The specified role does not encompass the following responsibilities: Finalization of sales agreements or the execution of sales contracts is prohibited. The role also does not carry the authority to make definitive decisions regarding contracts, be it their conclusion or termination. Furthermore, the role is not designed to involve participation in pricing negotiations or the authorization of contracts. These activities fall beyond the permissible duties of the position."
Micron benefits are designed to help you stay well, provide peace of mind and help you prepare for the future. We offer a choice of medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget. Micron also provides benefit programs that help protect your income if you are unable to work due to illness or injury, and paid family leave. Additionally, Micron benefits include a robust paid time-off program and paid holidays.
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
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