Senior ASIC Methodology Engineer

Company

QUALCOMM SEMICONDUCTORES Y SISTEMAS AVANZADOS DE BAJA CALIFORNIA

Job Area

Engineering Group, Engineering Group > ASICS Engineering

Role Overview

About the Role

As a member of the methodology/PPA team, you will work closely with various core teams to enable a state‑of‑the‑art design analytics platform. In this role, you will directly see the impact of our products in daily PPA exploration / optimization across various design teams.

Required Qualifications

• B.S/M.S. degree in Electrical Engineering, Computer Science.
• 1‑2 years of experience in related fields.
• Strong programming skills in Python.
• Hands‑on experience with static timing analysis (STA) tools, e.g., PrimeTime and Tempus.
• Experience with place & route tools and a good understanding of the ASIC RTL‑GDSII design flow is a plus.

Preferred Qualifications

• Critical thinking with good software architecture understanding to develop platforms at scale.
• Familiarity with GenAI models (e.g., LLMs such as GPT, Liama, etc.) and their application in real‑world solutions, such as chatbots, etc.
• Experience designing and developing agentic AI systems.
• Experience with version control tools like Perforce or Git is a plus.

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
• OR Master’s degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
• OR PhD in Science, Engineering, or related field.

Equal Opportunity Statement

Applicants: Qualcomm is an equal opportunity employer.

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