4800 Analog Layout Engineer (High Voltage)
ALTEN MÉXICO
¿Qué es?
Es un ingeniero especializado en diseñar los planos físicos (layouts) de chips electrónicos para aplicaciones de alto voltaje y gestión de energía, como los usados en autos y sistemas de potencia.
¿Cómo lo hace?
Utiliza herramientas como Cadence Virtuoso y tecnologías BCD (Bipolar-CMOS-DMOS) para crear diseños optimizados que cumplan con reglas de fabricación (DRC), verificación (LVS) y estándares de seguridad. Trabaja en equipo con diseñadores analógicos y de verificación para garantizar que los circuitos sean funcionales, confiables y eficientes.
Su trabajo es clave para el desarrollo de semiconductores avanzados en industrias como la automotriz, donde la precisión y la robustez son esenciales.
Diseño de layout para circuitos analógicos y mixtos (Analog IC Layout Design):
Nivel avanzado (+5 años de experiencia).
Tecnologías BCD (Bipolar-CMOS-DMOS):
Nivel avanzado (+5 años de experiencia).
Circuitos de alto voltaje (High-Voltage circuits):
Nivel avanzado (+5 años de experiencia).
Herramientas:
Cadence Virtuoso: Nivel avanzado (+5 años de experiencia).
Calibre (DRC/LVS): Nivel avanzado (+5 años de experiencia).
Verificación física y flujos de sign-off (DRC, LVS, EM/IR):
Nivel intermedio/avanzado (3-5 años de experiencia).
Técnicas de matching, simetría y efectos parásitos:
Nivel intermedio (2-5 años de experiencia).
Diseño de layouts:
- Desarrollar layouts de circuitos integrados analógicos y mixtos a nivel de bloque y módulo.
- Implementar diseños para circuitos de alto voltaje y gestión de energía.
Responsabilidad sobre bloques críticos:
- Tomar propiedad de macros y bloques IP dentro de proyectos complejos de circuitos integrados.
Integración y planificación:
- Apoyar en la planificación de top-level y la integración de bloques analógicos.
- Colaborar con equipos de diseño analógico, verificación y liderazgo de layout.
Verificación y validación:
- Realizar y apoyar actividades de DRC (Design Rule Check), LVS (Layout vs. Schematic).
- Ejecutar flujos de verificación física y sign-off.
Optimización de diseños:
- Optimizar layouts para rendimiento, matching, confiabilidad, área y fabricabilidad.
- Contribuir al reuso de IP y al desarrollo de nuevos bloques.
Revisión técnica:
- Participar en revisiones técnicas y discusiones de diseño con el equipo.
Trabajo en equipo:
- Colaborar con ingenieros de diseño, líderes de layout, equipos de verificación y gestión de proyectos.
Vacante publicada el 4 días atrás
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